{"product_id":"risc-microprocessors-history-and-overview-paperback","title":"RISC Microprocessors, History and Overview - Paperback","description":"\u003cdiv\u003e\u003cp style=\"text-align: right;\"\u003e\u003ca href=\"https:\/\/reportcopyrightinfringement.com\/\" target=\"_blank\" rel=\"nofollow\"\u003e\u003cb\u003eReport copyright infringement\u003c\/b\u003e\u003c\/a\u003e\u003c\/p\u003e\u003c\/div\u003e\u003cp\u003eby \u003cb\u003ePatrick H. Stakem\u003c\/b\u003e (Author)\u003c\/p\u003e\u003cp\u003eThis book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for \"Relegate Important Stuff to the Compiler,\" since the compilation process is done offline, and then the code is run. The time penalty paid at compile time is paid back by faster code execution. RISC machines place more burdens on their compilers. The alternative to RISC is CISC - Complex Instruction Set Computer. An example would be the legacy Intel x86, IA-32 instruction set. RISC involves a series of architectural features to enhance the throughput of operations. RISC has become a mainstream architectural feature in modern processors.\u003c\/p\u003e\n            \u003cdiv\u003e\n\u003cstrong\u003eNumber of Pages:\u003c\/strong\u003e 94\u003c\/div\u003e\n            \u003cdiv\u003e\n\u003cstrong\u003eDimensions:\u003c\/strong\u003e 0.23 x 9.02 x 5.98 IN\u003c\/div\u003e\n            \u003cdiv\u003e\n\u003cstrong\u003ePublication Date:\u003c\/strong\u003e October 07, 2018\u003c\/div\u003e\n            ","brand":"BooksCloud","offers":[{"title":"Default Title","offer_id":52492834406707,"sku":"9781726803601","price":19.13,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0300\/5595\/6612\/files\/V1NpU1lqNGlBMmNhb1RIUFJtV1MwUT09.webp?v=1759942698","url":"https:\/\/www.vysn.com\/en-ca\/products\/risc-microprocessors-history-and-overview-paperback","provider":"VYSN","version":"1.0","type":"link"}