{"product_id":"hardware-description-language-demystified-explore-digital-system-design-using-verilog-hdl-and-vlsi-design-tools-english-edition-paperback","title":"Hardware Description Language Demystified: Explore Digital System Design Using Verilog HDL and VLSI Design Tools (English Edition) - Paperback","description":"\u003cdiv\u003e\u003cp style=\"text-align: right;\"\u003e\u003ca href=\"https:\/\/reportcopyrightinfringement.com\/\" target=\"_blank\" rel=\"nofollow\"\u003e\u003cb\u003eReport copyright infringement\u003c\/b\u003e\u003c\/a\u003e\u003c\/p\u003e\u003c\/div\u003e\u003cp\u003eby \u003cb\u003eRajkumar Sarma\u003c\/b\u003e (Author), \u003cb\u003eCherry Bhargava\u003c\/b\u003e (Author)\u003c\/p\u003e\u003cp\u003e\u003cb\u003e Get familiar and work with the basic and advanced Modeling types in Verilog HDL \u003c\/b\u003e\u003cbr\u003e\u003cbr\u003e \u003cb\u003eKey Features\u003c\/b\u003e\u003c\/p\u003e\u003cli\u003eLearn about the step-wise process to use Verilog design tools such as Xilinx, Vivado, Cadence NC-SIM \u003c\/li\u003e\u003cli\u003eExplore the various types of HDL and its need \u003c\/li\u003e\u003cli\u003eLearn Verilog HDL modeling types using examples \u003c\/li\u003e\u003cli\u003eLearn advanced concept such as UDP, Switch level modeling \u003c\/li\u003e\u003cli\u003eLearn about FPGA based prototyping of the digital system \u003c\/li\u003e\u003cbr\u003e\u003cb\u003eDescription\u003c\/b\u003e\u003cbr\u003e Hardware Description Language (HDL) allows analysis and simulation of digital logic and circuits. The HDL is an integral part of the EDA (electronic design automation) tool for PLDs, microprocessors, and ASICs. So, HDL is used to describe a Digital System. The combinational and sequential logic circuits can be described easily using HDL. Verilog HDL, standardized as IEEE 1364, is a hardware description language used to model electronic systems. \u003cbr\u003e\u003cbr\u003eThis book is a comprehensive guide about the digital system and its design using various VLSI design tools as well as Verilog HDL. The step-wise procedure to use various VLSI tools such as Xilinx, Vivado, Cadence NC-SIM, is covered in this book. It also explains the advanced concept such as User Define Primitives (UDP), switch level modeling, reconfigurable computing, etc. Finally, this book ends with FPGA based prototyping of the digital system. \u003cbr\u003e\u003cbr\u003eBy the end of this book, you will understand everything related to digital system design. \u003cbr\u003e\u003cbr\u003e\u003cb\u003eWhat will you learn\u003c\/b\u003e\u003cbr\u003e \u003cli\u003e Implement Adder, Subtractor, Adder-Cum-Subtractor using Verilog HDL\u003c\/li\u003e\u003cli\u003eExplore the various Modeling styles in Verilog HDL \u003c\/li\u003e\u003cli\u003eImplement Switch level modeling using Verilog HDL \u003c\/li\u003e\u003cli\u003e Get familiar with advanced modeling techniques in Verilog HDL\u003c\/li\u003e\u003cli\u003eGet to know more about FPGA based prototyping using Verilog HDL \u003c\/li\u003e\u003cbr\u003e\u003cb\u003eWho this book is for\u003c\/b\u003e\u003cbr\u003e Anyone interested in Electronics and VLSI design and want to learn Digital System Design with Verilog HDL will find this book useful. IC developers can also use this book as a quick reference for Verilog HDL fundamentals \u0026amp; features. \u003cp\u003e\u003c\/p\u003e\u003cb\u003eTable of Contents\u003c\/b\u003e\u003cbr\u003e 1. An Introduction to VLSI Design Tools\u003cbr\u003e2. Need of Hardware Description Language (HDL)\u003cbr\u003e3. Logic Gate Implementation in Verilog HDL\u003cbr\u003e4. Adder-Subtractor Implementation Using Verilog HDL\u003cbr\u003e5. Multiplexer\/Demultiplexer Implementation in Verilog HDL\u003cbr\u003e6. Encoder\/Decoder Implementation Using Verilog HDL\u003cbr\u003e7. Magnitude Comparator Implementation Using Verilog HDL\u003cbr\u003e8. Flip-Flop Implementation Using Verilog HDL\u003cbr\u003e9. Shift Registers Implementation Using Verilog HDL\u003cbr\u003e10. Counter Implementation Using Verilog HDL\u003cbr\u003e11. Shift Register Counter Implementation Using Verilog HDL\u003cbr\u003e12. Advanced Modeling Techniques\u003cbr\u003e13. Switch Level Modeling\u003cbr\u003e14. FPGA Prototyping in Verilog HDL\u003cbr\u003e\u003cbr\u003e\u003cb\u003eAbout the Author\u003c\/b\u003e \u003cbr\u003e \u003cb\u003eDr. Cherry Bhargava\u003c\/b\u003e is working as an associate professor and head, VLSI domain, School of Electrical and Electronics Engineering at Lovely Professional University, Punjab, India. She has more than 14 years of teaching and research experience. She is Ph.D. (ECE), IKGPTU, M.Tech (VLSI Design \u0026amp; CAD) Thapar University and B.Tech (Electronics and Instrumentation) from Kurukshetra University. She is GATE qualified with All India Rank 428.\u003cbr\u003e She has authored about 50 technical research papers in SCI, Scopus indexed quality journals, and national\/international conferences. \u003cbr\u003e\u003cbr\u003e\u003cb\u003eDr. Rajkumar Sarma\u003c\/b\u003e received his B.E. in Electronics and Communications Engineering from Vinayaka Mission's University, Salem, India \u0026amp; M.Tech degree from Lovely Professional University, Phagwara, Punjab and currently pursuing Ph.D. from Lovely Professional University, Phagwara, Punjab.\n            \u003cdiv\u003e\n\u003cstrong\u003eNumber of Pages:\u003c\/strong\u003e 228\u003c\/div\u003e\n            \u003cdiv\u003e\n\u003cstrong\u003eDimensions:\u003c\/strong\u003e 0.48 x 9.25 x 7.5 IN\u003c\/div\u003e\n            \u003cdiv\u003e\n\u003cstrong\u003ePublication Date:\u003c\/strong\u003e August 27, 2020\u003c\/div\u003e\n            ","brand":"BooksCloud","offers":[{"title":"Default Title","offer_id":53343096308019,"sku":"9789389898040","price":33.93,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0300\/5595\/6612\/files\/9uxz4QGAOF9789389898040.webp?v=1778705618","url":"https:\/\/www.vysn.com\/en-ca\/products\/hardware-description-language-demystified-explore-digital-system-design-using-verilog-hdl-and-vlsi-design-tools-english-edition-paperback","provider":"VYSN","version":"1.0","type":"link"}